Invention Grant
US07683453B2 Edge termination region for high-voltage bipolar-CMOS-DMOS integrated circuit devices
有权
用于高压双极型CMOS-DMOS集成电路器件的边沿终端区域
- Patent Title: Edge termination region for high-voltage bipolar-CMOS-DMOS integrated circuit devices
- Patent Title (中): 用于高压双极型CMOS-DMOS集成电路器件的边沿终端区域
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Application No.: US11982803Application Date: 2007-11-05
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Publication No.: US07683453B2Publication Date: 2010-03-23
- Inventor: Richard K. Williams , Donald Ray Disney
- Applicant: Richard K. Williams , Donald Ray Disney
- Applicant Address: US CA Santa Clara
- Assignee: Advanced Analogic Technologies, Inc.
- Current Assignee: Advanced Analogic Technologies, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Patentability Associates
- Main IPC: H01L29/93
- IPC: H01L29/93

Abstract:
All low-temperature processes are used to fabricate a variety of semiconductor devices in a substrate the does not include an epitaxial layer. The devices include a non-isolated lateral DMOS, a non-isolated extended drain or drifted MOS device, a lateral trench DMOS, an isolated lateral DMOS, JFET and depletion-mode devices, and P-N diode clamps and rectifiers and junction terminations. Since the processes eliminate the need for high temperature processing and employ “as-implanted” dopant profiles, they constitute a modular architecture which allows devices to be added or omitted to the IC without the necessity of altering the processes used to produce the remaining devices.
Public/Granted literature
- US20080061400A1 High-voltage bipolar-CMOS-DMOS integrated circuit devices and modular methods of forming the same Public/Granted day:2008-03-13
Information query
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