Invention Grant
US07683456B2 Semiconductor devices, capacitor antifuses, dynamic random access memories, and cell plate bias connection methods 有权
半导体器件,电容器反熔丝,动态随机存取存储器和单元板偏置连接方法

Semiconductor devices, capacitor antifuses, dynamic random access memories, and cell plate bias connection methods
Abstract:
In one aspect, a semiconductor device includes an array of memory cells. Individual memory cells of the array include a capacitor having first and second electrodes, a dielectric layer disposed between the first and second electrodes. Select individual capacitors are energized so as to blow the dielectric layer to establish a connection between the first and second electrodes such that, after blowing the dielectric layer, the second electrode is coupled to a cell plate generator establishing a bias connection therebetween. Cell plate bias connection methods are also described.
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