Invention Grant
- Patent Title: Semiconductor integrated circuit and semiconductor device having multilayer interconnection
- Patent Title (中): 具有多层互连的半导体集成电路和半导体器件
-
Application No.: US11612840Application Date: 2006-12-19
-
Publication No.: US07683490B2Publication Date: 2010-03-23
- Inventor: Junichi Sekine
- Applicant: Junichi Sekine
- Applicant Address: JP Tokyo
- Assignee: Elpida Memory, Inc.
- Current Assignee: Elpida Memory, Inc.
- Current Assignee Address: JP Tokyo
- Agency: Sughrue Mion, PLLC
- Priority: JP2005-368635 20051221
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
A semiconductor device includes: multi-layer interconnection substrate having signal distribution interconnection and power supply line; and semiconductor circuit blocks installed on the multi-layer interconnection substrate for performing required operations. The multi-layer substrate includes: a third interconnection layer having interconnections extending in a first direction; a second interconnection layer having interconnections extending in a second direction which is different to the first direction; and a first interconnection layer having interconnections extends in a direction orthogonal to the first direction.
Public/Granted literature
- US20070138645A1 SEMICONDUCTOR INTEGRATED CIRCUIT AND SEMICONDUCTOR DEVICE HAVING MULTILAYER INTERCONNECTION Public/Granted day:2007-06-21
Information query
IPC分类: