An aspect of the semiconductor device comprising a package substrate which has a plurality of pads to which a power supply voltage is applied on an upper surface thereof, a first memory chip which is arranged on the package substrate and has a first power supply pad provided on a first side and a second power supply pad provided on a second side perpendicular to the first side, and a second memory chip which is translated in a direction along which the first and second power supply pads of the first memory chip are exposed, arranged on the first memory chip, and has the same structure as the first memory chip, wherein the first and second power supply pads are provided at diagonal corners of the first memory chip, respectively.