Invention Grant
- Patent Title: Output circuit
- Patent Title (中): 输出电路
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Application No.: US12104063Application Date: 2008-04-16
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Publication No.: US07683600B2Publication Date: 2010-03-23
- Inventor: Jiro Kanamaru , Toshiaki Akioka
- Applicant: Jiro Kanamaru , Toshiaki Akioka
- Applicant Address: JP Kanagawa
- Assignee: NEC Electronics Corporation
- Current Assignee: NEC Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Sughrue Mion, PLLC
- Priority: JP2007-111958 20070420
- Main IPC: G05F3/16
- IPC: G05F3/16

Abstract:
An output circuit in accordance with one embodiment of the present invention includes: an input terminal for receiving an input signal; an output transistor connected between a first power supply and an output terminal; a current control circuit connected to the input terminal and the output transistor for controlling current outflow and inflow for the gate of the output transistor based on the input signal; a voltage generating circuit connected to the first power supply; and a switch circuit coupled between the gate of the output transistor and the voltage generating circuit, the switch circuit having alternatively an on state and an off state thereof in response to the input signal; wherein the switch circuit becomes the off state when the potential difference between the gate of the output transistor and the first power supply becomes equal to or below a predetermine value regardless of the voltage level of the input signal.
Public/Granted literature
- US20080258702A1 OUTPUT CIRCUIT Public/Granted day:2008-10-23
Information query
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