This invention relates to a pattern recognition correlator implemented entirely in the electronic domain. The correlator has a serial to parallel conversion means to convert input serial binary data into at least one input parallel binary electrical signal and a comparator to compare the or each input parallel data signal with a reference parallel binary data signal. The serial to parallel conversion means may comprises a demultiplexer to effectively slow the data update rate and a series of latch circuits to provide the parallel data signal. The comparator may be arranged to perform bit addition and may be arranged such that a zero total sum is an indication of correlation. The bit addition may be performed b an array of logic gates.