Disclosed is a method of manufacturing a semiconductor device, which includes the steps of: forming a high-voltage well region (e.g., by implanting impurity ions into a semiconductor substrate and then annealing); forming an isolation layer on the semiconductor substrate; implanting impurity ions into the high-voltage well region, thereby forming a low-voltage well region within the high-voltage well region; forming a gate electrode on the semiconductor substrate; and implanting impurity ions using the gate electrode as a mask, thereby forming source/drain regions within the low-voltage well region.