Invention Grant
US07687365B2 CMOS structure for body ties in ultra-thin SOI (UTSOI) substrates
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CMOS结构，用于超薄SOI（UTSOI）衬底的体系结合
- Patent Title: CMOS structure for body ties in ultra-thin SOI (UTSOI) substrates
- Patent Title (中): CMOS结构，用于超薄SOI（UTSOI）衬底的体系结合
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Application No.: US11925136Application Date: 2007-10-26
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Publication No.: US07687365B2Publication Date: 2010-03-30
- Inventor: Jeffrey W. Sleight
- Applicant: Jeffrey W. Sleight
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Scully, Scott, Murphy & Presser, P.C.
- Agent Joseph P. Abate, Esq.
- Main IPC: H01L21/336
- IPC: H01L21/336
Abstract:
The present invention provides a semiconducting structure including a substrate having an UTSOI region and a bulk-Si region, wherein the UTSOI region and the bulk-Si region have a same crystallographic orientation; an isolation region separating the UTSOI region from the bulk-Si region; and at least one first device located in the UTSOI region and at least one second device located in the bulk-Si region. The UTSOI region has an SOI layer atop an insulating layer, wherein the SOI layer has a thickness of less than about 40 nm. The bulk-Si region further comprises a well region underlying the second device and a contact to the well region, wherein the contact stabilizes floating body effects.
Public/Granted literature
- US20080248615A1 CMOS STRUCTURE FOR BODY TIES IN ULTRA-THIN SOI (UTSOI) SUBSTRATES Public/Granted day:2008-10-09
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