Invention Grant
US07687799B2 Methods of forming buffer layer architecture on silicon and structures formed thereby
失效
在硅上形成缓冲层结构的方法和由此形成的结构
- Patent Title: Methods of forming buffer layer architecture on silicon and structures formed thereby
- Patent Title (中): 在硅上形成缓冲层结构的方法和由此形成的结构
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Application No.: US12214737Application Date: 2008-06-19
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Publication No.: US07687799B2Publication Date: 2010-03-30
- Inventor: Mantu K. Hudait , Peter G. Tolchinsky , Loren A. Chow , Dmitri Loubychev , Joel M. Fastenau , Amy W. K. Liu
- Applicant: Mantu K. Hudait , Peter G. Tolchinsky , Loren A. Chow , Dmitri Loubychev , Joel M. Fastenau , Amy W. K. Liu
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agent Kathy J. Ortiz
- Main IPC: H01L31/00
- IPC: H01L31/00 ; H01L21/338
Abstract:
Methods and associated structures of forming a microelectronic device are described. Those methods may include forming a GaSb nucleation layer on a substrate, forming a Ga(Al)AsSb buffer layer on the GaSb nucleation layer, forming an In0.52Al0.48As bottom barrier layer on the Ga(Al)AsSb buffer layer, and forming a graded InxAl1-xAs layer on the In0.52Al0.48As bottom barrier layer thus enabling the fabrication of low defect, device grade InGaAs based quantum well structures.
Public/Granted literature
- US20090315018A1 Methods of forming buffer layer architecture on silicon and structures formed thereby Public/Granted day:2009-12-24
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