Invention Grant
US07687843B2 Process for patterning capacitor structures in semiconductor trenches
有权
在半导体沟槽中构图电容器结构的工艺
- Patent Title: Process for patterning capacitor structures in semiconductor trenches
- Patent Title (中): 在半导体沟槽中构图电容器结构的工艺
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Application No.: US11270282Application Date: 2005-11-09
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Publication No.: US07687843B2Publication Date: 2010-03-30
- Inventor: Michael Rueb
- Applicant: Michael Rueb
- Applicant Address: DE Munich
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Munich
- Agency: Coats & Bennett, P.L.L.C.
- Priority: DE102004054352 20041109
- Main IPC: H01L27/108
- IPC: H01L27/108

Abstract:
A process for producing structures in a semiconductor zone, has the steps of a) producing a trench (2) in the semiconductor zone (18), b) filling the trench with a photoresist (19), and c) exposing the photoresist (19) using ion beams (20), d) developing the photoresist (19). The energy density and ion dose for the ion beams (20) are selected in such a way that the photoresist (19) is only chemically changed at defined depths, so as to produce two regions, in the first region (21) of which the photoresist has been chemically changed at the defined depths by the ion beams (20), and in the second region of which the photoresist has been left chemically unchanged, so that during the developing step the photoresist is removed in precisely one of the two regions.
Public/Granted literature
- US20060118852A1 Process for patterning capacitor structures in semiconductor trenches Public/Granted day:2006-06-08
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