Invention Grant
- Patent Title: Single damascene structure semiconductor device having silicon-diffused metal wiring layer
- Patent Title (中): 具有硅扩散金属布线层的单镶嵌结构半导体器件
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Application No.: US10650193Application Date: 2003-08-28
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Publication No.: US07687917B2Publication Date: 2010-03-30
- Inventor: Koichi Ohto , Toshiyuki Takewaki , Tatsuya Usami , Nobuyuki Yamanishi
- Applicant: Koichi Ohto , Toshiyuki Takewaki , Tatsuya Usami , Nobuyuki Yamanishi
- Applicant Address: JP Kanagawa
- Assignee: NEC Electronics Corporation
- Current Assignee: NEC Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Sughrue Mion, PLLC
- Priority: JP2002-132780 20020508; JP2002-302841 20021017; JP2003-130484 20030505
- Main IPC: H01L23/48
- IPC: H01L23/48
Abstract:
In a semiconductor device, an insulating interlayer having a groove is formed on an insulating underlayer. A silicon-diffused metal layer including no metal silicide is buried in the groove. A metal diffusion barrier layer is formed on the silicon-diffused metal layer and the insulating interlayer.
Public/Granted literature
- US20040046261A1 Semiconductor device having silicon-diffused metal wiring layer and its manufacturing method Public/Granted day:2004-03-11
Information query
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