Invention Grant
- Patent Title: Low power match-line sensing circuit
- Patent Title (中): 低功率匹配线感测电路
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Application No.: US12368473Application Date: 2009-02-10
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Publication No.: US07688610B2Publication Date: 2010-03-30
- Inventor: Igor Arsovski , Ali Sheikholeslami
- Applicant: Igor Arsovski , Ali Sheikholeslami
- Applicant Address: CA Ottawa
- Assignee: Mosaid Technologies Incorporated
- Current Assignee: Mosaid Technologies Incorporated
- Current Assignee Address: CA Ottawa
- Agency: Eaton Peabody Patent Group, LLC
- Agent Dennis R. Haszko
- Main IPC: G11C15/00
- IPC: G11C15/00

Abstract:
A low power matchline sensing scheme where power is distributed according to the number of mismatching bits occurring on a matchline is disclosed. In particular, match decisions involving a larger number of mismatched bits consume less power compared to match decisions having a lesser number of mismatched bits. The low power matchline sensing scheme is based upon a precharge-to-miss sensing architecture, and includes a current control circuit coupled to each matchline of the content addressable memory array for monitoring the voltage level of the matchline during a search operation. The current control circuit provides a voltage control signal to the current source of the matchline to adjust the amount of current applied to the matchline in response to the voltage of the matchline. In other words, matchlines that are slow to reach the match threshold voltage due to the presence of one or more mismatching bits will receive less current than matchlines having no mismatching bits. Significant power reduction without compromising search speed is realized since matchlines carrying a match result are provided with the maximum amount of current.
Public/Granted literature
- US20090147556A1 LOW POWER MATCH-LINE SENSING CIRCUIT Public/Granted day:2009-06-11
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