Invention Grant
US07688632B2 Nonvolatile semiconductor memory capable of trimming an initial program voltage for each word line
失效
非易失性半导体存储器,能够修整每个字线的初始编程电压
- Patent Title: Nonvolatile semiconductor memory capable of trimming an initial program voltage for each word line
- Patent Title (中): 非易失性半导体存储器,能够修整每个字线的初始编程电压
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Application No.: US11626143Application Date: 2007-01-23
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Publication No.: US07688632B2Publication Date: 2010-03-30
- Inventor: Hiroyuki Nagashima , Yasuyuki Fukuda
- Applicant: Hiroyuki Nagashima , Yasuyuki Fukuda
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2006-015187 20060124; JP2006-214203 20060807
- Main IPC: G11C16/12
- IPC: G11C16/12

Abstract:
A nonvolatile semiconductor memory of the present invention includes a plurality of bit lines and word lines which are arranged to intersect each other; a memory cell array having a plurality of electrically-programmable memory cells arranged in a region in which the bit lines and the word lines intersect; a trimming circuit configured to obtain a parameter of an initial program voltage for each word line of the plurality of word lines; an initial Vpgm parameter register configured to receive the parameter of the initial program voltage from the trimming circuit and to store the parameter; and a control circuit configured to perform programming of data to the memory cell array based on the parameter of the initial program voltage stored in the initial Vpgm parameter register, the trimming circuit being arranged in a part of the control circuit.
Public/Granted literature
- US20070177429A1 NONVOLATILE SEMICONDUCTOR MEMORY AND NONVOLATILE MEMORY SYSTEM USING THEREOF Public/Granted day:2007-08-02
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