Invention Grant
US07688670B2 Semiconductor device with improved power supply control for a plurality of memory arrays
有权
具有用于多个存储器阵列的改进的电源控制的半导体器件
- Patent Title: Semiconductor device with improved power supply control for a plurality of memory arrays
- Patent Title (中): 具有用于多个存储器阵列的改进的电源控制的半导体器件
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Application No.: US12165681Application Date: 2008-07-01
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Publication No.: US07688670B2Publication Date: 2010-03-30
- Inventor: Masashi Horiguchi , Masayuki Nakamura , Sadayuki Ohkuma , Kazuhiko Kajigaya , Yoshinobu Nakagome
- Applicant: Masashi Horiguchi , Masayuki Nakamura , Sadayuki Ohkuma , Kazuhiko Kajigaya , Yoshinobu Nakagome
- Applicant Address: US TX Austin
- Assignee: Rising Silicon, Inc.
- Current Assignee: Rising Silicon, Inc.
- Current Assignee Address: US TX Austin
- Agency: Marger Johnson & McCollom, P.C.
- Priority: JP10-098694 19980410
- Main IPC: G11C7/00
- IPC: G11C7/00

Abstract:
A synchronous DRAM is provided which includes arrangements for operations of power supply circuitry based upon whether the DRAM is in a power down mode or not. In one embodiment, a first power supply circuit and a second power supply circuit are provided which both receive externally supplied voltages and output internal supply voltages. The first power supply circuit is not in operation when a semiconductor device of the synchronous DRAM is in a power down mode. However, the second power supply circuit is continuously in operation during the power down mode. In another arrangement, the operation of a voltage limiter circuit is controlled based on whether or not the DRAM is in a power down mode.
Public/Granted literature
- US20080273413A1 SEMICONDUCTOR DEVICE Public/Granted day:2008-11-06
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