A method for manufacturing a semiconductor device having a damascene metal/insulator/metal (MIM)-type capacitor and metal lines including providing a semiconductor device; sequentially forming a first interlayer insulating film and a second interlayer insulating film over the semiconductor substrate; simultaneously forming a vias hole and a lower metal line in a line region and a lower electrode in a capacitor region, wherein the lower metal line and the lower electrode are electrically connected to the semiconductor device; sequentially forming a dielectric film, a third interlayer insulating film, a fourth interlayer insulating film and a fifth interlayer insulating film over the semiconductor substrate; and then simultaneously forming a plurality of upper electrodes, a plurality of second vias holes and a plurality of second upper metal lines in the capacitor region electrically connected to the plurality of upper electrodes, a plurality of third vias holes and a plurality of second upper metal lines in the capacitor region electrically connected to the lower electrode, and a plurality of fourth vias holes and a plurality of fourth upper metal lines in the line region electrically connected to the lower metal line.