Invention Grant
US07691710B2 Fabricating non-volatile memory with dual voltage select gate structure
有权
用双电压选择栅结构制造非易失性存储器
- Patent Title: Fabricating non-volatile memory with dual voltage select gate structure
- Patent Title (中): 用双电压选择栅结构制造非易失性存储器
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Application No.: US11550386Application Date: 2006-10-17
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Publication No.: US07691710B2Publication Date: 2010-04-06
- Inventor: Nima Mokhlesi , Masaaki Higashitani
- Applicant: Nima Mokhlesi , Masaaki Higashitani
- Applicant Address: US CA Milpitas
- Assignee: Sandisk Corporation
- Current Assignee: Sandisk Corporation
- Current Assignee Address: US CA Milpitas
- Agency: Vierra Magen Marcus & DeNiro LLP
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/8234 ; H01L21/3205 ; H01L21/4763
Abstract:
A select gate structure for a non-volatile storage system include a select gate and a coupling electrode which are independently drivable. The coupling electrode is adjacent to a word line in a NAND string and has a voltage applied which reduces gate induced drain lowering (GIDL) program disturb of an adjacent unselected non-volatile storage element. In particular, an elevated voltage can be applied to the coupling electrode when the adjacent word line is used for programming. A reduced voltage is applied when a non-adjacent word line is used for programming. The voltage can also be set based on other programming criterion. The select gate is provided by a first conductive region while the coupling electrode is provided by a second conductive region formed over, and isolated from, the first conductive region.
Public/Granted literature
- US20080090351A1 FABRICATING NON-VOLATILE MEMORY WITH DUAL VOLTAGE SELECT GATE STRUCTURE Public/Granted day:2008-04-17
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