Invention Grant
- Patent Title: Integrated circuit system employing a condensation process
- Patent Title (中): 采用冷凝工艺的集成电路系统
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Application No.: US11835059Application Date: 2007-08-07
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Publication No.: US07692213B2Publication Date: 2010-04-06
- Inventor: Lee Wee Teo , Yung Fu Chong , Elgin Kiok Boone Quek , Alain Chan
- Applicant: Lee Wee Teo , Yung Fu Chong , Elgin Kiok Boone Quek , Alain Chan
- Applicant Address: SG Singapore
- Assignee: Chartered Semiconductor Manufacturing Ltd.
- Current Assignee: Chartered Semiconductor Manufacturing Ltd.
- Current Assignee Address: SG Singapore
- Agent Mikio Ishimaru
- Main IPC: H01L29/778
- IPC: H01L29/778
Abstract:
An integrated circuit system that includes: providing a PFET device including a PFET gate and a PFET gate dielectric; forming a source/drain extension from a first epitaxial layer aligned to a first PFET gate sidewall spacer; and forming a source/drain from a second epitaxial layer aligned to a second PFET gate sidewall spacer.
Public/Granted literature
- US20090039388A1 INTEGRATED CIRCUIT SYSTEM EMPLOYING A CONDENSATION PROCESS Public/Granted day:2009-02-12
Information query
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