Invention Grant
- Patent Title: Semiconductor device storage cell structure, method of operation, and method of manufacture
- Patent Title (中): 半导体器件存储单元结构,操作方法和制造方法
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Application No.: US11799572Application Date: 2007-05-01
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Publication No.: US07692220B2Publication Date: 2010-04-06
- Inventor: Madhu P. Vora
- Applicant: Madhu P. Vora
- Applicant Address: US CA Los Gatos
- Assignee: SuVolta, Inc.
- Current Assignee: SuVolta, Inc.
- Current Assignee Address: US CA Los Gatos
- Agency: Haverstock & Owens, LLP
- Main IPC: H01L29/80
- IPC: H01L29/80

Abstract:
The invention can include at least one storage cell having a store gate structure formed from a semiconductor material doped to a first conductivity type and in contact with a channel region comprising a semiconductor material doped to a second conductivity type. A storage cell can also include at least a first source/drain region and a second source/drain region separated from one another by the channel region. A control gate structure, comprising a semiconductor layer doped to the first conductivity type can be formed over a substrate surface. The control gate structure can be in contact with the channel region. Such a storage cell can be more compact and/or provide longer data retention times than conventional storage cells, such as many conventional dynamic random access memory (DRAM) type cells.
Public/Granted literature
- US20080273398A1 Semiconductor device storage cell structure, method of operation, and method of manufacture Public/Granted day:2008-11-06
Information query
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