Invention Grant
US07692235B2 Nonvolatile semiconductor memory device including memory cells formed to have double-layered gate electrodes
有权
包括形成为具有双层栅电极的存储单元的非易失性半导体存储器件
- Patent Title: Nonvolatile semiconductor memory device including memory cells formed to have double-layered gate electrodes
- Patent Title (中): 包括形成为具有双层栅电极的存储单元的非易失性半导体存储器件
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Application No.: US11765043Application Date: 2007-06-19
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Publication No.: US07692235B2Publication Date: 2010-04-06
- Inventor: Toshitake Yaegashi
- Applicant: Toshitake Yaegashi
- Applicant Address: JP Toshiba
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Toshiba
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2006-170225 20060620
- Main IPC: H01L27/00
- IPC: H01L27/00

Abstract:
A nonvolatile semiconductor memory device includes a plurality of floating gate electrodes respectively formed above a semiconductor substrate with first insulating films disposed therebetween, and a control gate electrode formed above the plurality of floating gate electrodes with a second insulating film disposed therebetween. In each of the plurality of floating gate electrodes is formed to have a width of an upper portion thereof in a channel width direction which is smaller than a width of a lower portion thereof in the channel width direction and one of contact surfaces thereof on at least opposed sides which contact the second insulating film is formed to have one surface, and the second insulating film has a maximum film thickness in a vertical direction, the maximum film thickness being set smaller than a distance from a lowest surface to a highest surface of the second insulating film in the vertical direction.
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