Invention Grant
US07692278B2 Stacked-die packages with silicon vias and surface activated bonding
有权
具有硅通孔和表面激活键合的堆叠管芯封装
- Patent Title: Stacked-die packages with silicon vias and surface activated bonding
- Patent Title (中): 具有硅通孔和表面激活键合的堆叠管芯封装
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Application No.: US11642293Application Date: 2006-12-20
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Publication No.: US07692278B2Publication Date: 2010-04-06
- Inventor: Shanggar Periaman , Kooi Chi Ooi , Bok Eng Cheah
- Applicant: Shanggar Periaman , Kooi Chi Ooi , Bok Eng Cheah
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Buckley, Maschoff & Talwalkar LLC
- Main IPC: H01L23/31
- IPC: H01L23/31 ; H01L23/48 ; H01L23/498 ; H01L23/538

Abstract:
In some embodiments, an apparatus and a system are provided. The apparatus and the system may comprise a first integrated circuit die comprising a plurality of silicon vias and a first surface activated bonding site coupled to the plurality of silicon vias, and a second integrated circuit die comprising a second surface activated bonding site coupled to the first surface activated bonding site. The first surface activated bonding site may comprise a first clean metal and the second surface activated bonding site may comprise a second clean metal. If the first surface activated bonding site is coupled to the second surface activated bonding site respective metal atoms of the first activated surface activated bonding site are diffused into the second surface activated bonding site and respective metal atoms of the second activated surface activated bonding site are diffused into the first surface activated bonding site.
Public/Granted literature
- US20080150155A1 Stacked-die packages with silicon vias and surface activated bonding Public/Granted day:2008-06-26
Information query
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