Invention Grant
- Patent Title: Efficient provision of alignment marks on semiconductor wafer
- Patent Title (中): 在半导体晶圆上有效提供对准标记
-
Application No.: US11529621Application Date: 2006-09-28
-
Publication No.: US07692319B2Publication Date: 2010-04-06
- Inventor: Koichi Sogawa
- Applicant: Koichi Sogawa
- Applicant Address: JP Tokyo
- Assignee: Ricoh Company, Ltd.
- Current Assignee: Ricoh Company, Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Cooper & Dunham LLP
- Priority: JP2005-287164 20050930
- Main IPC: H01L23/544
- IPC: H01L23/544

Abstract:
A semiconductor wafer includes multi chip areas each including two or more device chip areas and arranged in an X-axis direction and a Y-axis direction, a plurality of scribe lines formed parallel to the X axis and the Y axis such as to separate the device chip areas from each other, and one or more alignment marks formed in each of the multi chip areas on the scribe lines between adjacent ones of the device chip areas included in one multi chip area, the one or more alignment marks being fewer than the device chip areas in each of the multi chip areas and used for positioning of the semiconductor wafer.
Public/Granted literature
- US20070077666A1 Efficient provision of alignment marks on semiconductor wafer Public/Granted day:2007-04-05
Information query
IPC分类: