Invention Grant
US07692905B2 Electrostatic discharge protection circuit for output buffer 有权
输出缓冲器用静电放电保护电路

Electrostatic discharge protection circuit for output buffer
Abstract:
An electrostatic discharge protection circuit for an electronic device includes an output buffer including a transistor having a gate configured to receive a control signal, a source connected to a voltage supply terminal, and a drain connected to a pad; and an ESD trigger circuit configured to produce a first electronic signal in response to an electrostatic voltage between the pad or the voltage supply terminal. The first electronic signal can isolate the control signal from the gate of the transistor and to turn on the transistor to discharge the electrostatic voltage between the pad and the voltage supply terminal.
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