Invention Grant
US07692906B2 Device for protecting an integrated circuit against latch-up phenomena
有权
用于保护集成电路免受闩锁现象的装置
- Patent Title: Device for protecting an integrated circuit against latch-up phenomena
- Patent Title (中): 用于保护集成电路免受闩锁现象的装置
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Application No.: US11626086Application Date: 2007-01-23
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Publication No.: US07692906B2Publication Date: 2010-04-06
- Inventor: François Tailliet
- Applicant: François Tailliet
- Applicant Address: FR Montrouge
- Assignee: STMicroelectronics SA
- Current Assignee: STMicroelectronics SA
- Current Assignee Address: FR Montrouge
- Agency: Seed IP Law Group PLLC
- Agent Lisa K. Jorgenson; Eric M. Ringer
- Main IPC: H02H9/00
- IPC: H02H9/00 ; H02H3/00 ; H02H3/20 ; H02H9/04 ; H02H3/27 ; H02H3/08 ; H02H9/02 ; H02H9/08
Abstract:
Device for protecting an integrated circuit, comprising a device for detecting a latch-up condition, and a supply voltage control device for controlling a supply voltage of the integrated circuit, to modify a parameter of the supply voltage of the integrated circuit in order to prevent the latch-up from becoming permanently established.
Public/Granted literature
- US20070188961A1 DEVICE FOR PROTECTING AN INTEGRATED CIRCUIT AGAINST LATCH-UP PHENOMENA Public/Granted day:2007-08-16
Information query
