Invention Grant
- Patent Title: Reconfigurable input/output in hierarchical memory link
- Patent Title (中): 分层存储器链路中可重配置的输入/输出
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Application No.: US11484173Application Date: 2006-07-11
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Publication No.: US07692945B2Publication Date: 2010-04-06
- Inventor: Joo-Sun Choi
- Applicant: Joo-Sun Choi
- Applicant Address: KR
- Assignee: Samsung Electronics, Co., Ltd.
- Current Assignee: Samsung Electronics, Co., Ltd.
- Current Assignee Address: KR
- Agency: Mills & Onello, LLP
- Priority: KR10-2005-0087751 20050921
- Main IPC: G11C5/06
- IPC: G11C5/06

Abstract:
A memory system and memory module includes a plurality of memory devices, each having a plurality, e.g. four, ports for transmitting and receiving command signals, write data signals and read data signals. One of the memory devices is connected to a host or controller, and the remaining memories are connected together, typically by point-to-point links. When the memory system configuration is such that at least one of the ports in at least one of the memory devices is not used, one or more other ports can use the pins that may otherwise have been used by the unused ports. As a result, a set of reconfigurable, shared pins is defined in which two ports share the pins. The port that is not being used in a particular application for the memory device is not connected to the shared pins, and another port that is being used in the application is connected to the shared pins. This allows for the used of fewer package pins and, consequently, reduced package size.
Public/Granted literature
- US20070064515A1 Reconfigurable input/output in hierarchical memory link Public/Granted day:2007-03-22
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