Invention Grant
- Patent Title: Source-biased SRAM cell with reduced memory cell leakage
- Patent Title (中): 源偏置SRAM单元，具有减少的存储单元泄漏
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Application No.: US11451043Application Date: 2006-06-12
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Publication No.: US07692964B1Publication Date: 2010-04-06
- Inventor: Deepak Sabharwal , Alexander Shubat
- Applicant: Deepak Sabharwal , Alexander Shubat
- Applicant Address: US CA Fremont
- Assignee: Virage Logic Corp.
- Current Assignee: Virage Logic Corp.
- Current Assignee Address: US CA Fremont
- Agency: The Danamraj Law Group, P.C.
- Main IPC: G11C11/34
- IPC: G11C11/34
Abstract:
A Static Random Access Memory (SRAM) cell having a source-biasing mechanism for leakage reduction. In standby mode, the cell's wordline is deselected and a source-biasing potential is provided to the cell. In read mode, the wordline is selected and responsive thereto, the source-biasing potential provided to the cell is deactivated. Upon completion of reading, the source-biasing potential is re-activated.
Information query
