Invention Grant
- Patent Title: System and method for mitigating reverse bias leakage
- Patent Title (中): 用于减轻反向偏置泄漏的系统和方法
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Application No.: US12118420Application Date: 2008-05-09
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Publication No.: US07692975B2Publication Date: 2010-04-06
- Inventor: John David Porter
- Applicant: John David Porter
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron & Huebsch, PLLC
- Main IPC: G11C7/10
- IPC: G11C7/10 ; G11C5/02

Abstract:
The present disclosure includes devices, methods, and systems for programming memory, such as resistance variable memory. One embodiment can include an array of resistance variable memory cells, wherein the resistance variable memory cells are coupled to one or more data lines, a row decoder connected to a first side of the array, a column decoder connected to a second side of the array, wherein the second side is adjacent to the first side, a gap located adjacent to the row decoder and the column decoder, and clamp circuitry configured to control a reverse bias voltage associated with one or more unselected memory cells during a programming operation, wherein the clamp circuitry is located in the gap and is selectively coupled to the one or more data lines.
Public/Granted literature
- US20090279374A1 SYSTEM AND METHOD FOR MITIGATING REVERSE BIAS LEAKAGE Public/Granted day:2009-11-12
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