Invention Grant
US07693124B2 Slot-to-interlace and interlace-to-slot converters for an OFDM system
失效
用于OFDM系统的时隙到交织和交织到时隙转换器
- Patent Title: Slot-to-interlace and interlace-to-slot converters for an OFDM system
- Patent Title (中): 用于OFDM系统的时隙到交织和交织到时隙转换器
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Application No.: US11133089Application Date: 2005-05-18
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Publication No.: US07693124B2Publication Date: 2010-04-06
- Inventor: Jai N. Subrahmanyam , Kevin Stuart Cousineau , Michael Mao Wang
- Applicant: Jai N. Subrahmanyam , Kevin Stuart Cousineau , Michael Mao Wang
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Gerald P. Joyce, III
- Main IPC: G06F15/16
- IPC: G06F15/16

Abstract:
In an OFDM system, multiple (M) interlaces are defined for M non-overlapping sets of frequency subbands, and M slots with fixed indices are also defined. Data streams and pilot are mapped to slots, which are in turn mapped to interlaces based on a slot-to-interlace mapping scheme that can achieve frequency diversity and good performance for all slots. At a transmitter, a slot-to-interlace converter maps the slots to the interlaces. The slot-to-interlace converter includes multiple multiplexers and a control unit. The multiplexers map the M slots to the M interlaces based on the slot-to-interlace mapping scheme. The control unit generates at least one control signal for the multiplexers. The multiplexers may be arranged and controlled in various manners depending on the slot-to-interlace mapping scheme. At a receiver, a complementary interlace-to-slot converter maps the interlaces to the slots.
Public/Granted literature
- US20060002362A1 Slot-to-interlace and interlace-to-slot converters for an OFDM system Public/Granted day:2006-01-05
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