Invention Grant
US07693223B2 Testing methods of a semiconductor integrated incorporating a high-frequency receiving circuit and a demodulation circuit 失效
包含高频接收电路和解调电路的集成电路的测试方法

Testing methods of a semiconductor integrated incorporating a high-frequency receiving circuit and a demodulation circuit
Abstract:
A semiconductor integrated circuit that can be tested in a reduced test time includes a high-frequency receiving circuit for receiving a high-frequency signal, and a demodulation circuit for demodulating a signal received from the high-frequency receiving circuit. The demodulation circuit includes a Static Random Access Memory (SRAM), an SRAM control circuit, and a test data transmitting circuit. The SRAM control circuit receives, from a semiconductor test device, test data for driving and testing the high-frequency receiving circuit, and writes the test data into the SRAM. The test data transmitting circuit reads out from the SRAM test data for driving and testing the high-frequency receiving circuit, and transmits the test data to the high-frequency receiving circuit.
Public/Granted literature
Information query
Patent Agency Ranking
0/0