Invention Grant
- Patent Title: Semiconductor device
- Patent Title (中): 半导体器件
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Application No.: US11764862Application Date: 2007-06-19
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Publication No.: US07694194B2Publication Date: 2010-04-06
- Inventor: Hideki Hayashi , Mitsuo Serizawa
- Applicant: Hideki Hayashi , Mitsuo Serizawa
- Applicant Address: JP Tokyo
- Assignee: Hitachi ULSI Systems Co., Ltd.
- Current Assignee: Hitachi ULSI Systems Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Miles & Stockbridge P.C.
- Priority: JP2006-206077 20060728
- Main IPC: G11C29/34
- IPC: G11C29/34 ; G11C29/50

Abstract:
A highly reliable semiconductor device includes, for example, a memory circuit MEM such as a multiport RAM and a BIST circuit (BIST[A] and BIST[B]) for carrying out a test for each of the ports PO[A] and PO[B] of the MEM, as well as pointers PNT0[A] to PNT3[A] and PNT0[B] to PNT3[B] corresponding to the PO[A] and PO[B], respectively. Each of the BIST[A] and BIST[B] manages plural respective segments SEG0 to SEG3 obtained by dividing the MEM and the PNT0[A] to PNT3[A] are provided for those SEG0 to SEG3, respectively. For example, the BIST[A], upon accessing SEG0, writes ‘1’ in PNT0[A] while the BIST[B] refers to the value in this PNT0[A], thereby its access to SEG0 can be avoided. Consequently, each port can execute a complicated test pattern asynchronously.
Public/Granted literature
- US20080028267A1 SEMICONDUCTOR DEVICE Public/Granted day:2008-01-31
Information query
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