Invention Grant
US07694200B2 Integrated circuit having built-in self-test features 有权
集成电路具有内置的自检功能

Integrated circuit having built-in self-test features
Abstract:
An integrated circuit and a method of built-in self test in the integrated circuit employ an offset control node and offset capabilities with the integrated circuit in order to communicate and distribute a built-in self-test signal. The built-in self-test signal can emulate signals internal to the integrated circuit during normal operation, and/or the built-in self-test signal can have other signal characteristics representative of signals other than those signals internal to the integrated circuit during normal operation.
Public/Granted literature
Information query
Patent Agency Ranking
0/0