A method of wiring data transmission lines between a CPU including CPU data pins identified by a set of pin numbers and a DRAM including DRAM data pins also identified by the set of pin numbers, the method including connecting the CPU data pins to the DRAM data pins with data transmission lines including unit-bit data transmission lines so that the unit-bit data transmission lines do not cross each other and without matching the pin numbers of the CPU data pins to the pin numbers of the DRAM data pins.