An array substrate for a liquid crystal display device includes a substrate, a plurality of thin film transistors formed on the substrate, each thin film transistor includes a gate electrode, a first gate insulation layer, a second gate insulation layer, an active layer, an ohmic contact layer, a source electrode and a drain electrode, a plurality of gate lines, a plurality of data lines disposed orthogonal to the plurality of gate lines, a plurality of pixel electrodes disposed at pixel regions defined by intersections of the plurality of gate lines and the plurality of data lines, each pixel electrode electrically contacting each drain electrode of the plurality of thin film transistors, and a plurality of storage capacitors each including a portion of each gate line as a first capacitor electrode, the first gate insulation layer as a dielectric layer, and a capacitor electrode electrically communicating with each pixel electrode and functioning as a second capacitor electrode with a portion of each pixel electrode.