Method of fabricating semiconductor device employing selectivity poly deposition

Invention Grant

US07696039B2 Method of fabricating semiconductor device employing selectivity poly deposition 失效

Title translation: 使用选择性聚合沉积制造半导体器件的方法

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Patent Title: Method of fabricating semiconductor device employing selectivity poly deposition
Patent Title (中): 使用选择性聚合沉积制造半导体器件的方法
Application No.: US11809734

Application Date: 2007-05-31
Publication No.: US07696039B2

Publication Date: 2010-04-13
Inventor: Myung Jin Jung
Applicant: Myung Jin Jung
Applicant Address: KR Seoul
Assignee: Dongbu Electronics Co., Ltd.
Current Assignee: Dongbu Electronics Co., Ltd.
Current Assignee Address: KR Seoul
Agency: The Law Offices of Andrew D. Fortney
Agent Andrew D. Fortney; Theresa J. Mahan
Priority: KR10-2003-0100543 20031230
Main IPC: H01L21/8238
IPC: H01L21/8238 ; H01L21/336

Method of fabricating semiconductor device employing selectivity poly deposition

Abstract:

A method for fabricating a semiconductor device employing a selectivity poly deposition is disclosed. The disclosed method comprises depositing selectivity poly on a gate poly and source/drain regions of the silicon substrate, and forming salicide regions on the gate and active regions from the deposited selectivity poly. Accordingly, the present invention employing selectivity poly deposition can reduce or minimize contact surface resistance and improve the electrical characteristics of the semiconductor device by reducing the surface resistance in a miniature semiconductor device. In addition, because the size of the gate electrode is getting small, the present invention can be used as an essential part of the future generations of nano-scale technology. Moreover, mass semiconductor production systems can promptly employ the present invention with existing equipment.

Abstract(Chinese):

公开了一种使用选择性聚合物沉积的半导体器件的制造方法。所公开的方法包括在硅衬底的栅极多晶硅和源极/漏极区上沉积选择性多晶硅，以及从沉积的选择性聚硅在栅极和有源区上形成硅化物区域。因此，采用选择性聚合沉积的本发明可以通过降低微型半导体器件中的表面电阻来降低或最小化接触表面电阻并改善半导体器件的电特性。另外，由于栅电极的尺寸变小，本发明可以作为下一代纳米技术的重要组成部分。此外，大量半导体生产系统可以利用现有的设备来及时采用本发明。

Public/Granted literature

US20070238277A1 Method of fabricating semiconductor device employing selectivity poly deposition Public/Granted day:2007-10-11

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/70	.由在一共用基片内或其上形成的多个固态组件或集成电路组成的器件或其部件的制造或处理；集成电路器件或其特殊部件的制造（由预制电组件组成的组装件的制造入H05K3/00，H05K13/00）
H01L21/77	..在公共衬底中或上面形成的由许多固态元件或集成电路组成的器件的制造或处理（电可编程只读存储器或其多步骤的制造方法入H01L27/115）
H01L21/78	...把衬底连续地分成多个独立的器件（改变表面物理特性或者半导体形状的切割入H01L21/304）
H01L21/82	....制造器件，例如每一个由许多元件组成的集成电路
H01L21/822	.....衬底是采用硅工艺的半导体的（H01L21/8258优先）
H01L21/8232	......场效应工艺
H01L21/8234	.......MIS工艺
H01L21/8238	........互补场效应晶体管，例如CMOS