Invention Grant
- Patent Title: Method of forming a dual damascene pattern of a semiconductor device
- Patent Title (中): 形成半导体器件的双镶嵌图案的方法
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Application No.: US12164007Application Date: 2008-06-28
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Publication No.: US07696087B2Publication Date: 2010-04-13
- Inventor: Chan Sun Hyun
- Applicant: Chan Sun Hyun
- Applicant Address: KR Icheon-si
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Icheon-si
- Agency: Townsend and Townsend and Crew LLP
- Priority: KR2007-102165 20071010
- Main IPC: H01L21/4763
- IPC: H01L21/4763

Abstract:
In a method of forming a dual damascene pattern of a semiconductor device, horns that occur while forming a trench constituting the dual damascene pattern are removed in an intermediate process of forming the trench. Thus, the source of particles, which occur due to the horns in a cleaning process performed after the dual damascene pattern is formed, may be removed. Accordingly, an increase of contact resistance due to particles may be prevented, and a reduction in the yield of semiconductor devices may also be improved.
Public/Granted literature
- US20090163032A1 METHOD OF FORMING A DUAL DAMASCENE PATTERN OF A SEMICONDUCTOR DEVICE Public/Granted day:2009-06-25
Information query
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