Invention Grant
- Patent Title: Method for improved planarization in semiconductor devices
- Patent Title (中): 改进半导体器件平面化的方法
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Application No.: US11616563Application Date: 2006-12-27
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Publication No.: US07696094B2Publication Date: 2010-04-13
- Inventor: David Matsumoto , Michael Brennan , Vidyut Gopal , Jean Yang
- Applicant: David Matsumoto , Michael Brennan , Vidyut Gopal , Jean Yang
- Applicant Address: US CA Sunnyvale US CA Sunnyvale
- Assignee: Spansion LLC,Advanced Micro Devices, Inc.
- Current Assignee: Spansion LLC,Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Sunnyvale US CA Sunnyvale
- Agency: Harrity & Harrity, LLP
- Main IPC: H01L21/302
- IPC: H01L21/302

Abstract:
A method for forming a semiconductor device may include forming a silicon oxynitride mask layer over a first layer. The first layer may be etched using the silicon oxynitride mask layer, to form a pattern in the first layer. The pattern may be filled with a dielectric material. The dielectric material may be planarized using a ceria-based slurry and using the silicon oxynitride mask layer as a stop layer.
Public/Granted literature
- US20080160764A1 METHOD FOR IMPROVED PLANARIZATION IN SEMICONDUCTOR DEVICES Public/Granted day:2008-07-03
Information query
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