Invention Grant
- Patent Title: Semiconductor device with burried semiconductor regions
- Patent Title (中): 具有埋半导体区域的半导体器件
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Application No.: US11210681Application Date: 2005-08-25
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Publication No.: US07696547B2Publication Date: 2010-04-13
- Inventor: Hisanori Ihara , Nagataka Tanaka , Hiroshige Goto
- Applicant: Hisanori Ihara , Nagataka Tanaka , Hiroshige Goto
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2004-244692 20040825
- Main IPC: H01L31/062
- IPC: H01L31/062

Abstract:
A solid-state image sensor having a well of a first conductivity type; a photoelectric conversion region having a second conductivity type formed in the well storing charges obtained from a photoelectric conversion; a drain region having the second conductivity type formed in the well apart from a surface of the well; and a gate electrode formed on the surface of the well via a gate insulator, the gate electrode transferring the charges from the photoelectric conversion region to the drain region. Alternatively, a transistor includes a first semiconductor region having a first conductivity type; second and third semiconductor regions having a second conductivity type formed in the first semiconductor region, the second and third semiconductor regions being separated from each other by a portion of the first semiconductor region serving as a channel region; an insulator layer provided on a surface of the first semiconductor region in contact with the channel region; a gate electrode provided on the insulator layer; and the first semiconductor region includes a shield semiconductor region of the first conductivity type disposed between the surface of the first semiconductor region and at least one of the second and third semiconductor regions such that the at least one of the second and third semiconductor regions is sandwiched between the shield region and the first semiconductor region.
Public/Granted literature
- US20060046369A1 Semiconductor device with burried semiconductor regions Public/Granted day:2006-03-02
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