Invention Grant
US07696556B2 Nonvolatile memory devices including high-voltage MOS transistors with floated drain-side auxiliary gates and methods of fabricating the same
有权
包括具有浮置漏极侧辅助栅极的高压MOS晶体管的非易失性存储器件及其制造方法
- Patent Title: Nonvolatile memory devices including high-voltage MOS transistors with floated drain-side auxiliary gates and methods of fabricating the same
- Patent Title (中): 包括具有浮置漏极侧辅助栅极的高压MOS晶体管的非易失性存储器件及其制造方法
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Application No.: US11518724Application Date: 2006-09-11
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Publication No.: US07696556B2Publication Date: 2010-04-13
- Inventor: Sung-Hoi Hur , Young-Min Park , Sang-Bin Song , Min-Cheol Park , Ji-Hwon Lee , Su-Youn Yi , Jang-Min Yoo
- Applicant: Sung-Hoi Hur , Young-Min Park , Sang-Bin Song , Min-Cheol Park , Ji-Hwon Lee , Su-Youn Yi , Jang-Min Yoo
- Applicant Address: KR
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR
- Agency: Mills & Onello, LLP
- Priority: KR10-2005-0088335 20050922
- Main IPC: H01L29/788
- IPC: H01L29/788 ; H01L21/8238

Abstract:
High-voltage MOS transistors with a floated drain-side auxiliary gate are provided. The high-voltage MOS transistors include a source region and a drain region provided in a semiconductor substrate. A main gate electrode is disposed over the semiconductor substrate between the drain region and the source region. A lower drain-side auxiliary gate and an upper drain-side auxiliary gate are sequentially stacked over the semiconductor substrate between the main gate electrode and the drain region. The lower drain-side auxiliary gate is electrically insulated from the semiconductor substrate, the main gate electrode and the upper drain-side auxiliary gate. Methods of fabricating the high-voltage MOS transistors are also provided.
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