Invention Grant
US07696804B2 Method for incorporating transistor snap-back protection in a level shifter circuit
有权
在电平转换电路中并入晶体管快速保护的方法
- Patent Title: Method for incorporating transistor snap-back protection in a level shifter circuit
- Patent Title (中): 在电平转换电路中并入晶体管快速保护的方法
-
Application No.: US11695011Application Date: 2007-03-31
-
Publication No.: US07696804B2Publication Date: 2010-04-13
- Inventor: Tyler J. Thorp , Luca G. Fasoli
- Applicant: Tyler J. Thorp , Luca G. Fasoli
- Applicant Address: US CA Milpitas
- Assignee: SanDisk 3D LLC
- Current Assignee: SanDisk 3D LLC
- Current Assignee Address: US CA Milpitas
- Agency: Zagorin O'Brien Graham LLP
- Main IPC: H03L5/00
- IPC: H03L5/00

Abstract:
Level shift circuits are disclosed for level shifting an input signal corresponding to a first voltage domain, to generate a pair of complementary output signals corresponding to a second, higher-voltage domain. Snap-back sensitive devices in a discharge circuit for a high voltage output node are protected, irrespective of the loading on the output node, and without requiring precise transistor sizing as a function of the output loading. The snap-back sensitive devices are protected by a voltage shifter circuit in series with the sensitive devices, to limit the voltage across the sensitive devices, even for a high capacitance output node at its highest output voltage. The voltage shifter circuit is then bypassed to provide for an output low level that fully reaches the lower power supply rail.
Public/Granted literature
- US20080238522A1 METHOD FOR INCORPORATING TRANSISTOR SNAP-BACK PROTECTION IN A LEVEL SHIFTER CIRCUIT Public/Granted day:2008-10-02
Information query