Invention Grant
- Patent Title: Methods and circuits to reduce threshold voltage tolerance and skew in multi-threshold voltage applications
- Patent Title (中): 降低多阈值电压应用中阈值电压容限和偏斜的方法和电路
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Application No.: US11941342Application Date: 2007-11-16
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Publication No.: US07696811B2Publication Date: 2010-04-13
- Inventor: Corey Kenneth Barrows , Douglas W. Kemerer , Stephen Gerard Shuma , Douglas Willard Stout , Oscar Conrad Strohacker , Mark Steven Styduhar , Paul Steven Zuchowski
- Applicant: Corey Kenneth Barrows , Douglas W. Kemerer , Stephen Gerard Shuma , Douglas Willard Stout , Oscar Conrad Strohacker , Mark Steven Styduhar , Paul Steven Zuchowski
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Schmeiser, Olsen & Watts
- Agent Riyon W. Harding
- Main IPC: H03K3/01
- IPC: H03K3/01
Abstract:
A design structure. The design structure includes: a first set of FETs having a designed first Vt and a second set of FETs having a designed second Vt, the first Vt different from the second Vt; a first monitor circuit containing at least one FET of the first set of FETs and a second monitor circuit containing at least one FET of the second set of FETs; a compare circuit configured to generate a compare signal based on a performance measurement of the first monitor circuit and of the second monitor circuit; a control unit responsive to the compare signal and configured to generate a control signal regulator based on the compare signal; and an adjustable voltage regulator responsive to the control signal and configured to voltage bias wells of FETs of the second set of FETs, the value of the voltage bias applied based on the control signal.
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