Invention Grant
US07697319B2 Non-volatile memory device including bistable circuit with pre-load and set phases and related system and method
有权
包括具有预加载和设置阶段的双稳态电路的非易失性存储器件以及相关的系统和方法
- Patent Title: Non-volatile memory device including bistable circuit with pre-load and set phases and related system and method
- Patent Title (中): 包括具有预加载和设置阶段的双稳态电路的非易失性存储器件以及相关的系统和方法
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Application No.: US11706865Application Date: 2007-02-14
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Publication No.: US07697319B2Publication Date: 2010-04-13
- Inventor: Laurent Dedieu , Sebastien Lefebvre
- Applicant: Laurent Dedieu , Sebastien Lefebvre
- Applicant Address: FR Montrouge
- Assignee: STMicroelectronics, SA
- Current Assignee: STMicroelectronics, SA
- Current Assignee Address: FR Montrouge
- Agency: Graybeal Jackson LLP
- Agent Kevin D. Jablonski
- Priority: FR0601292 20060214
- Main IPC: G11C11/00
- IPC: G11C11/00
Abstract:
An embodiment of a device for memorization of a memory bit is provided, comprising a bistable circuit having complementary first and second read/write terminals, wherein the device comprises an initialization input connected to said bistable circuit, said input being designed to go into a first state controlling a pre-load phase of said bistable circuit and following said preload phase, to go into a second state controlling setting up of said memory bit and its complement at said read/write terminals.
Public/Granted literature
- US20070211520A1 Non-volatile memory device and related system and method Public/Granted day:2007-09-13
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