Invention Grant
- Patent Title: Integrated circuits; method for manufacturing an integrated circuit; method for decreasing the influence of magnetic fields; memory module
- Patent Title (中): 集成电路; 集成电路制造方法; 降低磁场影响的方法; 内存模块
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Application No.: US11775599Application Date: 2007-07-10
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Publication No.: US07697322B2Publication Date: 2010-04-13
- Inventor: Rainer Leuschner , Ulrich Klostermann
- Applicant: Rainer Leuschner , Ulrich Klostermann
- Applicant Address: DE Munich FR Corbeil Essonnes Cedex
- Assignee: Qimonda AG,ALTIS Semiconductor, SNC
- Current Assignee: Qimonda AG,ALTIS Semiconductor, SNC
- Current Assignee Address: DE Munich FR Corbeil Essonnes Cedex
- Agency: Slater & Matsil, L.L.P.
- Main IPC: G11C11/00
- IPC: G11C11/00

Abstract:
Embodiments of the invention relate generally to integrated circuits, to a method for manufacturing an integrated circuit, to a method for decreasing the influence of magnetic fields, and to a memory module. In an embodiment of the invention, an integrated circuit having a magnetic tunnel junction is provided. The magnetic tunnel junction may include a free layer with a magnetization orientation that is selected by the application of a write current through the magnetic tunnel junction, and a retention layer that retains the selectable magnetization orientation of the free layer at temperatures below a retention temperature.
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