Invention Grant
- Patent Title: Reducing programming error in memory devices
- Patent Title (中): 减少存储设备中的编程错误
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Application No.: US11995806Application Date: 2007-05-10
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Publication No.: US07697326B2Publication Date: 2010-04-13
- Inventor: Naftali Sommer , Ofir Shalvi
- Applicant: Naftali Sommer , Ofir Shalvi
- Applicant Address: IL Herzilia Pituach
- Assignee: Anobit Technologies Ltd.
- Current Assignee: Anobit Technologies Ltd.
- Current Assignee Address: IL Herzilia Pituach
- Agency: Darby & Darby P.C.
- International Application: PCT/IL2007/000575 WO 20070510
- International Announcement: WO2007/132452 WO 20071122
- Main IPC: G11C16/04
- IPC: G11C16/04

Abstract:
A method for storing data in an array (28) of analog memory cells (32) includes defining a constellation of voltage levels (90A, 90B, 90C, 90D) to be used in storing the data. A part of the data is written to a first analog memory cell in the array by applying to the analog memory cell a first voltage level selected from the constellation. After writing the part of the data to the first analog memory cell, a second voltage level that does not belong to the constellation is read from the first analog memory cell. A modification to be made in writing to one or more of the analog memory cells in the array is determined responsively to the second voltage level, and data are written to the one or more of the analog memory cells subject to the modification.
Public/Granted literature
- US20090103358A1 REDUCING PROGRAMMING ERROR IN MEMORY DEVICES Public/Granted day:2009-04-23
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