Invention Grant
US07697340B2 Methods and apparatuses for trimming reference cells in semiconductor memory devices
失效
用于修整半导体存储器件中的参考单元的方法和装置
- Patent Title: Methods and apparatuses for trimming reference cells in semiconductor memory devices
- Patent Title (中): 用于修整半导体存储器件中的参考单元的方法和装置
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Application No.: US11806587Application Date: 2007-06-01
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Publication No.: US07697340B2Publication Date: 2010-04-13
- Inventor: Chae-Hoon Kim , Dae-Han Kim
- Applicant: Chae-Hoon Kim , Dae-Han Kim
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2006-0123527 20061207
- Main IPC: G11C11/34
- IPC: G11C11/34

Abstract:
A method and apparatus for trimming a reference cell in a semiconductor memory device are provided. The method includes generating an internal bias current capable of being trimmed, and trimming the reference cell based on the internal bias current. The semiconductor memory device includes a reference cell in which a reference cell current flows between a drain and a source based on a bias voltage, an internal bias current generator configured to generate an internal bias current capable of being trimmed, and a trimming circuit configured to trim the reference cell based on the internal bias current.
Public/Granted literature
- US20080137433A1 Methods and apparatuses for trimming reference cells in semiconductor memory devices Public/Granted day:2008-06-12
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