A circuit for performing a read operation in a NAND flash memory is disclosed. The NAND flash memory includes an array of bit lines grouped into first group of bit lines and second group of bit lines. The circuit includes a plurality of pre-charging and reading circuitries connected at first end of the array of bit lines and a plurality of pre-charging circuitries connected at second end of the array of bit lines. The pre-charging and reading circuitries include a select circuit which selects one group from the first and the second group of bit lines; a first and a second circuit to pre-charge and read the selected group of bit lines from the first end. The plurality of pre-charging circuits include two select lines to select one group of bit lines, and a plurality of pre-charging transistors to pre-charge the selected group of bit lines from the second end.