Invention Grant
- Patent Title: Method of testing semiconductor apparatus
- Patent Title (中): 半导体装置的测试方法
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Application No.: US11987082Application Date: 2007-11-27
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Publication No.: US07697356B2Publication Date: 2010-04-13
- Inventor: Naoto Akiyama
- Applicant: Naoto Akiyama
- Applicant Address: JP Kawasaki, Kanagawa
- Assignee: NEC Electronics Corporation
- Current Assignee: NEC Electronics Corporation
- Current Assignee Address: JP Kawasaki, Kanagawa
- Agency: McGinn, IP Law Group, PLLC
- Priority: JP2006-319583 20061128
- Main IPC: G11C7/00
- IPC: G11C7/00

Abstract:
A method of testing a semiconductor apparatus performs a function test of reading data from memory cells in SRAM by applying a potential lower than a GND potential to a backgate of an n-type MOS transistor with a drain connected with a storage node and a source connected with the GND potential. Then, the method performs a function test of reading data from memory cells by applying a potential higher than the GND potential to the backgate.
Public/Granted literature
- US20080181036A1 Method of testing semiconductor apparatus Public/Granted day:2008-07-31
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