Invention Grant
- Patent Title: Demodulation circuit and demodulating method
- Patent Title (中): 解调电路和解调方法
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Application No.: US11450465Application Date: 2006-06-12
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Publication No.: US07697637B2Publication Date: 2010-04-13
- Inventor: Tatsuaki Kitta , Takanori Iwamatsu
- Applicant: Tatsuaki Kitta , Takanori Iwamatsu
- Applicant Address: JP Yokohama
- Assignee: Fujitsu Microelectronics Limited
- Current Assignee: Fujitsu Microelectronics Limited
- Current Assignee Address: JP Yokohama
- Agency: Arent Fox LLP
- Priority: JP2006-013205 20060120
- Main IPC: H04L27/00
- IPC: H04L27/00

Abstract:
A demodulation circuit can perform a capturing operation although a frequency error is large. A phase comparator out puts a predetermined value other than 0 as a determination result of a phase error when a phase error of a carrier wave is large and a signal point is located at a predetermined position. A loop filter outputs a negative minimum value to an integrator when an integrated value of a determination result reaches a positive maximum value of a limiter. Thus, when a phase error is large, a value changing from a negative minimum value to a positive maximum value is output from the loop filter, thereby realizing a broad synchronous capture range.
Public/Granted literature
- US20070172002A1 Demodulation circuit and demodulating method Public/Granted day:2007-07-26
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