Invention Grant
- Patent Title: Lock system and method for interpolator based receivers
- Patent Title (中): 用于基于插值器的接收器的锁定系统和方法
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Application No.: US10880833Application Date: 2004-06-30
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Publication No.: US07697651B2Publication Date: 2010-04-13
- Inventor: Chamath Abhayagunawardhana , Arif Mahmud , Kianoush Rahbar
- Applicant: Chamath Abhayagunawardhana , Arif Mahmud , Kianoush Rahbar
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Main IPC: H03D3/24
- IPC: H03D3/24

Abstract:
A tracking loop of an interpolator based receiver includes clock elements that generate a plurality of clocks to sample a signal from a remote transmitter. The tracking loop includes samplers and voter elements that sample the signal with the clocks and generate samples that comparatively indicate a phase relationship between the signal and the clocks. Based on the comparison of the samples in the samplers and voter elements, the tracking loop either sends phase-shift signals to the clock elements to shift the phase of the clocks to match the phase of the signal, or sends a phase-flip signal to the clock elements to flip the clocks if the phase relationship between the signal and the clocks is about 180°. Once a phase match between the clocks and the signal is established, the tracking loop remains phase locked with the signal and provides a recovered signal.
Public/Granted literature
- US20060002502A1 Lock system and method for interpolator based receivers Public/Granted day:2006-01-05
Information query
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