Invention Grant
- Patent Title: Semiconductor integrated circuit and testing method of same
- Patent Title (中): 半导体集成电路及其测试方法相同
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Application No.: US11892357Application Date: 2007-08-22
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Publication No.: US07698087B2Publication Date: 2010-04-13
- Inventor: Kota Yamaguchi
- Applicant: Kota Yamaguchi
- Applicant Address: JP Yokohama
- Assignee: Fujitsu Microelectronics Limited
- Current Assignee: Fujitsu Microelectronics Limited
- Current Assignee Address: JP Yokohama
- Agency: Arent Fox LLP
- Priority: JP2006-229578 20060825
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F19/00

Abstract:
A program circuit activates a pass signal when a first program unit is programmed. The first program unit is programmed when a test of an internal circuit is passed. A mode setting circuit switches an operation mode to a normal operation mode or a test mode by external control. A state machine allows a partial circuit of the internal circuit to perform an unusual operation different from a normal operation when the pass signal is inactivated during the normal operation mode. By recognizing the unusual operation during the normal operation mode, it can be easily recognized that a semiconductor integrated circuit is bad. Since a failure can be recognized without shifting to the test mode, for example, a user who purchases the semiconductor integrated circuit can also easily recognize the failure.
Public/Granted literature
- US20080048703A1 Semiconductor integrated circuit and testing method of same Public/Granted day:2008-02-28
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