A cache miss judger judges a cache miss when a cache access is executed. An entry region judger judges which of a plurality of entry regions constituted with one or a plurality of cache entries in the cache memory is accessed by each of the cache accesses using at least a part of an index for selecting an arbitrary cache line in the cache memory. A cache miss counter counts number of the cache misses judged by the cache miss judger in each of the entry regions that is made to correspond to each of the cache accesses.