Invention Grant
- Patent Title: System for improving parity generation and rebuild performance
- Patent Title (中): 改善奇偶校验和重建性能的系统
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Application No.: US10925170Application Date: 2004-08-25
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Publication No.: US07698625B2Publication Date: 2010-04-13
- Inventor: Robert L. Horn
- Applicant: Robert L. Horn
- Applicant Address: US CA Milpitas
- Assignee: Adaptec, Inc.
- Current Assignee: Adaptec, Inc.
- Current Assignee Address: US CA Milpitas
- Agency: Dickstein Shapiro LLP
- Main IPC: H03M13/00
- IPC: H03M13/00

Abstract:
A dual parity hardware architecture that enables data to be read from each sector only once and performs both the P parity and Q parity from the single data source. The Q parity calculator provides parallel processing capabilities so that multiple parity operations are performed on the same sector simultaneously. The dual parity hardware architecture provides flexibility in restoring data, generating parity, and updating parity for differing data sector sizes.
Public/Granted literature
- US20050050384A1 System for improving parity generation and rebuild performance Public/Granted day:2005-03-03
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